HSD
High Speed Debugger
In same cases the maximum of 6 MHz of the FTDI2232 chip is too slow. So the idea was born to build a debugger which can operate at higher TCK speed. My first idea is a comination of a AT91SAM7(64, 128 or 256) and a FT245R from FTDI.
Now there is a new idea based on the samtux board. The board has an expansion header where the whole data- and addressbus is avaiable. The goal is to make a daughter board with a MAXII from Altera with does the JTAG stuff. The MAXII is controlled via OpenOCD. I think that a TCK from about 50 Mhz is possible.
In same cases the maximum of 6 MHz of the FTDI2232 chip is too slow. So the idea was born to build a debugger which can operate at higher TCK speed. My first idea is a comination of a AT91SAM7(64, 128 or 256) and a FT245R from FTDI.
Now there is a new idea based on the samtux board. The board has an expansion header where the whole data- and addressbus is avaiable. The goal is to make a daughter board with a MAXII from Altera with does the JTAG stuff. The MAXII is controlled via OpenOCD. I think that a TCK from about 50 Mhz is possible.
© 2008/2009/2010 Joern Kaipf
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